发明名称 |
INTEGRATED-CIRCUIT PACKAGE CONFIGURATION FOR PACKAGING AN INTEGRATED-CIRCUIT DIE AND METHOD OF PACKAGING AN INTEGRATED-CIRCUIT DIE |
摘要 |
A package design configuration for an integrated-circuit die (104) includes a leadframe having its bonding fingers (106) connected to the periphery of an electrically-insulated, heat-conductive substrate (102), formed, for example, of a ceramic material. A number of electrically conductive traces (110), or bonding islands, serve as intermediate bonding locations for shorter bonding wires (112, 116) connecting bonding pads (114) on the integrated-circuit die (104) to the bonding fingers (106) of the leadframe. The integrated-circuit die overlies the conductive traces while still providing an exposed portion of the conductive traces as a respective intermediate attachment area for respective bonding wires. The conductive traces serving as bonding islands are formed by deposition of thin-film material using semiconductor fabrication techniques or by deposition of thick-film material using printing techniques. |
申请公布号 |
WO9317455(A3) |
申请公布日期 |
1993.11.25 |
申请号 |
WO1993US01490 |
申请日期 |
1993.02.19 |
申请人 |
VLSI TECHNOLOGY, INC. |
发明人 |
KWON, YOUNG, IL;LIANG, LOUIS, H. |
分类号 |
H01L21/60;H01L23/495;H01L23/498;H01L23/50 |
主分类号 |
H01L21/60 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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