Open bit line memory devices and operational method.

摘要

An open bit line memory device and operational method are provided having performance characteristics commensurate with those of folded bit line architecture. The memory device includes a plurality of memory cells in open bit line configuration, at least some of which are interconnected by a bit line. A sense amplifier unit is coupled to the bit line for sensing a developing signal thereon during a predefined bit line signal development interval. The amplifier sets to one of two logical states during a subsequent setting interval. An electrical isolator is employed to decouple the bit line from the sense amplifier during the setting interval so that signal variations on the bit line do not effect the amplifier. Each bit line also has an associated reference voltage line, and the electrical isolator isolates both the bit line and the associated reference voltage line from the sense amplifier during amplifier's setting period. <IMAGE>