| 摘要 |
A byte swapping circuit which selectively orders the bytes of a 16 or 32 bit word to enable proper transmission of data between an AT computer and a VMEbus. The byte swapping circuit generally includes first, second, third and fourth groups of buffers which are disposed in parallel along an internal bus of the circuit. The first group of buffers swaps the bytes of a word having bytes A, B, C and D into the order D, C, B and A. The second group of buffers transmits a word having bytes A, B, C and D in the same order without any byte swapping. The third group of buffers swaps the bytes A and B of a 16 bit word into the order B, A. The fourth group of buffers shifts the C and D bytes of a 32 bit word, which would normally occupy bit positions 16-31, into bit positions 0-15. A control register selectively enables one group of buffers at a time to effect the needed byte swapping.
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