| 摘要 |
An SOI-type insulated-gate FET is formed such that an electrical resistance across a pn-junction of the source region is less than that across a pn-junction of the drain region. This is accomplished by providing the FET with a metal dopant, such as aluminum or tungsten; by excessively doping the source region; by providing an amorphous source region; or by providing a layer formed of a material having a different thermal expansion coefficient from the thermal expansion coefficient of the material forming the source region, upon the source region. In the thus fabricated transistor, there is generated a carrier generation center or a precipitation of the impurities at a pn-junction formed between the source region and the semiconductor substrate. Thus, a current path is formed across the pn-junction of the source region in both the forward and reverse directions of a diode of the pn-junction, so as to substantially eliminate the potential difference between the source region and the semiconductor substrate. Accordingly, a kink phenomenon in the drain voltage-current characteristics is eliminated.
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