发明名称 TEST DATA CONVERTING SYSTEM
摘要 PURPOSE:To make the converting process in a short time with the test data conversion system concerned which performs the conversion into test data by the use of the logical simulation result. CONSTITUTION:A logical circuit simulation system 1 includes a logical simulation part 10 which carrys out the binary conversion of a logic circuit due to a net list, etc., set forth by a character code by the use of a binary conversion part 5, carrys out the binary conversion of the test data 7 for simulation by another binary conversion part 8, inputs binary net list 6 and binary test data 9, and the executes a logical simulation. The system 1 also includes a simulation result 11. The expectation value, the input value due to the code capable of distinguishing whether the pin state of the logical circuit 2 is for input or output, and the result from expectation value reference are defined, and a conversion part 3 converts into test data 12 including the expectation value based upon the result from expectation value referencing by the use of the expectation value and the result from expectation value referencing of the logical simulation.
申请公布号 JPH05307068(A) 申请公布日期 1993.11.19
申请号 JP19920112021 申请日期 1992.05.01
申请人 FUJITSU LTD 发明人 FURUMOTO SHIGEHISA
分类号 G01R31/28;G06F11/22;G06F11/25;G06F11/26;G06F17/50 主分类号 G01R31/28
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