| 摘要 |
<p>PURPOSE:To efficiently execute data rewriting in an IC memory card including an EEPROM in its self without increasing the number of pins. CONSTITUTION:A system controller 104 in a host processor 100 supplies an address data identification(ID) signal -A/D, a read/write ID signal R/-W, a bus clock BCK, and an erase ID signal ES to an IC memory card 200 as control signals. In the card 200, an operation mode decoder 406 judges the logical states of respective control signals and controls respective parts in accordance with respective modes. In the case of an address setting mode, a latch circuit 402 is started to latch an address generated from the processor 100, and in the case of a data erasing mode, an erasing sequencer 408 is started to erase data in accordance with a latched address. In a data writing mode, a writing sequencer 410 is started to write data, and in a data reading mode, a reading sequencer 412 is started to read out data.</p> |
