发明名称 REFRESH SIGNAL SWITCHING CIRCUIT
摘要 <p>PURPOSE:To reduce the power consumption of an equipment using a DRAM at a suspend time. CONSTITUTION:In an information processor using the DRAMs to both of a main memory 1 and a video memory 5, this device is constituted so that a refresh signal outputted from a main memory controller 2 at the suspend time of the device is imparted to both of the main memory 1 and the video memory 5 through a main memory 1/F 8. For the purpose, this device is provided with a refresh signal switching circuit 11 switching the refresh signal supplied to a video memory I/F 10 to any I/F of the main memory I/F 8 and the video memory I/F 9 selectively and a switching control circuit 12 controlling the circuit 11. Further, a power source stopping circuit 13 stopping the supply of power to a display controller 4 at the suspend time is provided.</p>
申请公布号 JPH05307881(A) 申请公布日期 1993.11.19
申请号 JP19920134320 申请日期 1992.04.27
申请人 OKI ELECTRIC IND CO LTD 发明人 OKAZAKI HIDETOSHI
分类号 G06F1/32;G11C11/401;G11C11/405;(IPC1-7):G11C11/405 主分类号 G06F1/32
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