发明名称 CLOCK SWITCHING CIRCUIT
摘要 <p>PURPOSE:To enlarge an area operating at low voltage so as to prevent malfunction by making the frequency of a system clock low when power voltage drops and it becomes low voltage less than standard voltage. CONSTITUTION:Power voltage 11 is compared with reference voltage generation circuits 12(1)-12(n) by comparators 13(1)-13(n), and it is converted into comparator output signals 14(1)-14(n). A multiplexer 7 selects frequency-dividing clocks 16(1)-16(n) in accordance with the comparator outputs 14(1)-14(n). Thus, the clock of the frequency, which corresponds to power voltage 11, is selected. Thus, the area (margin) operating at low voltage is enlarged and malfunction is eliminated.</p>
申请公布号 JPH05307422(A) 申请公布日期 1993.11.19
申请号 JP19920137926 申请日期 1992.04.30
申请人 MITSUBISHI ELECTRIC CORP 发明人 YANO AKIHIRO
分类号 G06F1/04;G06F1/06;G06F1/08;(IPC1-7):G06F1/04 主分类号 G06F1/04
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