| 摘要 |
PURPOSE:To perform high-speed fault simulation by making a circuit of a fault simulation algorithm to build it in an object circuit and simulating this object circuit on a logic simulation executing mechanism. CONSTITUTION:An input pattern inserting part 1 inserts an input pattern to a circuit simulation part 3. A fault data inserting part 2 inserts fault data, which a fault data extracting part 6 extracts from a fault list 8, to a circuit simulation part 3. A fault drop part 5 removes fault data, which can be detected, from the fault list 8. For example, the object circuit is converted to a fault simulation circuit to increase the number of gates from 5 to 20. That is, the number of gates is increased four times, but the fault simulation speed is very increased when this logic simulation executing mechanism is used. |
