TIME-DIVISION MULTIPLEXED SIGNAL RECEIVING CIRCUIT

摘要

PURPOSE:To decrease the circuit scale and reduce the size of a device by handling phase offsets on a time-division basis even when a master station receives mutually out-of-phase burst type digital signals from plural slave stations. CONSTITUTION:A plase comparator 1 generates the output epsilon of phase comparison between a reception modulation output DEM-OUT and reception timing RT. A phase offset generating circuit 2 presets the initial value of a phase offset storage circuit 3 in synchronism with a preset signal indicating the head timing of the burst from a burst timing generating circuit 8 and outputs the phase offset obtained by integrating the output epsilon of the comparator 1. A counter 5 outputs the reference frequency division phase obtained by dividing the frequency of a clock by N and (N-1) frequency division phases obtained by delaying the reference frequency division output by 1/n and one of them is selected according to the phase offset and outputted as reception timing. Consequently, the reception timing can be synchronized and the circuit scale is decreased to reduce the size of the device.