Bicmos SOI wafer having thin and thick SOI regions of silicon.

摘要

A SOI BiCMOS integrated circuit has CMOS devices formed in a thin epitaxial layer of 1000 ANGSTROM and bipolar devices formed in a thick epitaxial layer of 1 mu m, the two thicknesses being formed by a process in which a set of oxide islands are formed on a first wafer; an epitaxial layer is grown from bipolar silicon regions up and over the islands in a step that forms the bottom portion of the bipolar regions; the first wafer is inverted and oxide- bonded to a second wafer with the newly grown epitaxial layer below the islands so that the new top surface has a high quality epitaxial layer; excess silicon is removed from the new surface and the surface is polished to a thickness of 1000 ANGSTROM over the islands by use of a nitride polish stop layer, leaving a thick layer of epitaxial silicon of 1 mu m in the bipolar regions and a 1000 ANGSTROM thick layer of epitaxial silicon in the CMOS regions.