| 摘要 |
A partitioned boundary-scan interconnect test method for loaded printed wiring boards (PWB's) is disclosed which reduces testing-induced damage to electronic components, The method is adapted to expeditiously identify all short-circuits on a PWB. The partitioned boundary-scan interconnect test includes four sub-tests. A powered shorts boundary-scan sub-test searches for short-circuit faults between conventional nets and boundary-scan nets. A boundary-scan interconnect shorts sub-test searches for short-circuits between boundary- scan nets n1-n5. The boundary-scan interconnect shorts sub-test is optimized by testing a single driver on each net. All other drivers are tested during a boundary-scan bus- wire sub-test. A boundary-scan in-circuit sub-test checks the connectivity of boundary-scan devices in partial boundary-scan nets (i.e., nets having a driver or receiver but not both). By partitioning the boundary-scan interconnect test into these sub-tests, the potential for testing-induced damage is reduced. The circuit being tested may include a plurality of IC chips U1-U6 interconnected by nets or nodes. The test data pattern inputted into a scan path and read out at 110 provides indications of any short circuits present which are repaired first before proceeding to tests for open circuits. <IMAGE> |
