发明名称 Semiconductor memory device with volatile memory and non-volatile memory in latched arrangement
摘要 A semiconductor memory device has memory cells where each cell is constructed with a volatile memory and a non-volatile memory. The semiconductor memory device has a non-volatile memory initializing mode in which the data in the non-volatile memory is erased and a temporary latch by a sense amplifier of data in the volatile memory is done during the nonvolatile memory initializing mode. Initialization of the non-volatile memory is achieved by injecting electrons into the non-volatile memory. If sufficient electrons are present in the non-volatile memory when the non-volatile memory initializing mode is required, it is not necessary to inject electrons. After the non-volatile memory is initialized, new data is written to the non-volatile memory via the volatile memory by injecting holes into the non-volatile memory in an EEPROM mode.
申请公布号 US5262986(A) 申请公布日期 1993.11.16
申请号 US19910743893 申请日期 1991.08.12
申请人 SHARP KABUSHIKI KAISHA 发明人 YAMAUCHI, YOSHIMITSU
分类号 G11C11/00;G11C14/00;(IPC1-7):H01L29/68;G11C11/34 主分类号 G11C11/00
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