| 摘要 |
<p>PURPOSE:To reduce the parasitic capacity and power consumption by forming pixel areas, wherein TFTs and display pixel electrodes connected thereto are arranged, of plural different pixels which are arranged periodically and repeatedly nearby matrix intersections of plural signal lines and scanning lines, and writing individual signals in the individual pixels. CONSTITUTION:The pixel area consisting of a pixel A27 composed of a TFTA22, a TFTA'23, and a pixel capacitance A24 and a pixel B28 composed of a TFTB25 and a pixel capacitance B26 is formed at each of the intersections of the scanning lines 20 and signal lines 21. Individual pixel capacitances each consist of display pixel electrodes A59 and B50 and a common electrode, and a liquid crystal layer sandwiched between them. Thus, the pixel area is formed by using plural pixels A27 where a signal voltage is written only when two different scanning lines 20 are selected and plural pixels B28 wherein a signal voltage is written when one scanning line 20 is selected. Consequently, the intersection parts of the scanning lines 20 and signal lines 21 for the number of pixels can be made less than that of a conventional liquid crystal display element, and the probability of the short-circuiting of both lines and the parasitic capacitance of the signal lines are reducible.</p> |
