发明名称 Apparatus and method for reducing harmonic interference generated by a clock signal
摘要 An apparatus and method therefor substantially reducing the interference of a harmonic frequency component (301) of a clock signal with a filtered received signal (302), comprises a frequency spreading signal generator (127) and a signal modulator (125). The frequency spreading signal generator (127) produces a frequency spreading signal (130). The signal modulator (125) modulates the clock signal, produced by a clock signal generator (129), with the frequency spreading signal (130) to produce a modulated clock signal (131) including a modulated harmonic frequency component (303). The power level of a modulated harmonic frequency component (303), corresponding to the harmonic frequency component interfering with the filtered signal (202-204), is spread over a frequency bandwidth (f6-f7) greater than the predetermined frequency bandwidth (f4-f5) causing the power level of the modulated harmonic frequency component (303) within the predetermined frequency bandwidth (f4-f5) to decrease.
申请公布号 US5263055(A) 申请公布日期 1993.11.16
申请号 US19910787489 申请日期 1991.11.04
申请人 MOTOROLA, INC. 发明人 CAHILL, STEPHEN V.
分类号 H03B1/04;H03D1/04;H04B1/52;(IPC1-7):H03D1/04;H03D1/06;H03K5/01;H03K6/04 主分类号 H03B1/04
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