| 摘要 |
PURPOSE:To prevent enlarging of a difference in level between a cell region and a peripheral circuit a region even if the cell capacity is increased in a stacked capacitor type DRAM. CONSTITUTION:The top of a MOS transistor is covered by a first interlayer isolation film 106 and a second interlayer isolation film 107 and these interlayer isolation films are provided with the openings reaching an n-type diffusion layer 105, which is a source-drain region of the MOS transistor and a charge storage electrode 108 is formed on an inner wall of the opening hole. A capacitive insulating film 109 and a counter electrode 110 are provided on the charge storage electrode 108. |
