发明名称 |
Semiconductor memory having redundancy circuit with means to switch power from a normal memory block to a spare memory block |
摘要 |
In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.
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申请公布号 |
US5262993(A) |
申请公布日期 |
1993.11.16 |
申请号 |
US19910789024 |
申请日期 |
1991.11.06 |
申请人 |
HITACHI, LTD.;HITACHI VLSI ENGINEERING CORPORATION |
发明人 |
HORIGUCHI, MASASHI;ETOH, JUN;AOKI, MASAKAZU;NAKAGOME, YOSHINOBU;TANAKA, HITOSHI;ITOH, KIYOO |
分类号 |
G11C11/413;G11C5/14;G11C11/401;G11C29/00;G11C29/04;H01L21/82;H01L21/8242;H01L27/10;H01L27/108;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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