| 摘要 |
<p>PURPOSE:To realize a clock circuit where time is optionally updated with simple configuration by newly providing a flip-flop circuit and a microprogram control part. CONSTITUTION:An up counter UC counts a fixed cycle clock, counts the portion of a time value corresponding to a time unit which is higher-order than the time unit corresponding to the fixed cycle clock and outputs a carrying signal. A first register R1 successively fetches the counted value of the up counter UC and also fetches the carrying signal, and the flip-flop circuit FF is set by the carrying signal in the first register R1. The fifth register R5 holds the value corresponding to the high-order time unit, which is read from a host computer. The microprogram control part MCTL generates the time updating value with the set output of the FF circuit as an interruption input, the forth register R4 temporarily holds the time updating value so as to transfer it to the register R5 and a sequencer SEQ generates a timing.</p> |
