| 摘要 |
PURPOSE:To reduce the time till a multi-frame synchronizing signal is detected in a 2Mbps intra-station line having a handling group. CONSTITUTION:A bit signal including a multi-frame synchronizing signal extracted from a 2Mbps intra-station line 1 having a handling group by extraction circuits 31-35 is stored in registers 41-45 for 8-bits each respectively. Position selection circuits 61-65 select one bit among the 8-bits latched respectively in the registers 41-45. Synchronizing signal discrimination circuits 51-55 check whether or not the bits selected by the position selection circuits 61-65 and succeeding bits extracted by the extraction circuits 31-35 are the multi-frame synchronizing signal. If the bit signal is not the multi-frame synchronizing signal, the position selection circuits 61-65 change the selected bits and the same processing as above is repeated till the multi-frame synchronizing signal is detected. |
