发明名称 CIRCUIT FOR LOGIC-CIRCUIT DIAGNOSIS, DIAGNOSIS SYSTEM AND DEVICE SCANNING SYSTEM
摘要 PURPOSE:To perform a diagnosis and a device scanning operation with good efficiency by a method wherein an additive logic is added to a bit-serial scanning circuit and a scanning-system changeover signal is input. CONSTITUTION:A signal input S and additive circuits 101 to 103 which function as a selection logic are added to, and constituted in, a serial scanning circuit. The additive circuit 101 is provider with a constitution which performs a logic operation for a signal from the signal input S and for an address signal by means of an OR gate. For example, when a signal indicated by 0 out of outputs from an address decoder 104 is set at a high level, a state that flip-flops B0, B1 are selected simultaneously is set and data can be written and read out simultaneously. The additive circuits 102, 103 perform a logic operation for signals of ordinary logic pins I, O as pins which input and output data and for the signal input S with reference to flip-flops B1, B2. When the signal input S is set at a high level, the ordinary logic pins can be used to input/output data on a scanning operation. When the signal input S is set at a low level, an address signal and an ordinary logic are not affected. As a result, the same logic function as an ordinary bit-serial scanning circuit can be realized.
申请公布号 JPH05302959(A) 申请公布日期 1993.11.16
申请号 JP19920110314 申请日期 1992.04.28
申请人 HITACHI LTD 发明人 WATAI HIROO;MORIWAKI IKU;NAGAI MASAHIKO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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