| 摘要 |
<p>PURPOSE:To reduce the time change ratio of an output waveform, to suppress a switching noise, and to improve a reliability by serially connecting a resistor with the drain of an MOS transistor. CONSTITUTION:The second stage CMOS invertor circuit and BiMOS invertor circuit are connected in parallel with the first stage CMOS invertor circuit, and the first stage CMOS invertor circuit is constituted by serially connecting the drain of a (p) channel MOS field effect transistor 1 with the drain of an (n) channel MOS field effect transistor 2. And also, the second stage CMOS invertor circuit is constituted by serially connecting the drain of a (p) channel MOS transistor 3 with the drain of an (n) channel MOS transistor 4. Then, the second stage BiM0S invertor being the output stage is constituted by serially connecting the drain of a (p) channel MOS transistor 5 with the drain of an (n) channel MOS transistor 6 with a resistor 15 interposed between those MOS transistors.</p> |
