| 摘要 |
<p>A circuit for decoding a bi-phase mark signal comprises a circuit (2, 3) for detecting transitions in the signal, a counter (4) for producing an output signal proportional to the period between consecutive transitions in the signal, and a comparator (5) for comparing the value provided by the counter (4) with a reference value that is the mean between short and long periods of the incoming bi-phase signal. The mean value is derived by scaling the output of the counter (4) in a scaler (9) by a value determined in accordance with the output from the comparator (5) and by filtering the output of the scaler (9) in a recursive loop that is returned to an input (6) of the comparator (5). A data extractor circuit (14) coupled to outputs of the transition detector (3) and the comparator (5) serves to decode the bi-phase signal in an arrangement which compensates for variation in the overall repetition rate of the incoming bi-phase signal, for example due to variations in the speed of a video tape.</p> |
