发明名称 |
Complementary MOS to emitter-coupled logic level converter - gives output voltages from three-stage bipolar level-shifter referred to fixed potential |
摘要 |
A current-switching stage (1) in the emitter circuit of a bipolar transistor (4) drives a level-shifting stage (2) contg. the base-to-emitter paths of cascaded bipolar transistors (13-15). The base of the first transistor (4) is returned to a fixed reference voltage (V1) which exceeds the emitter supply voltage (VCC) by four times the drop across a diode. The high CMOS level of input (5) causes an n-channel MOSFET (11) to shunt the resistance-diode combination (10,12). The low CMOS level cuts-off the MOSFET so that the resistance (10) drops about 0.8 V to the ECL signal level. ADVANTAGE - Function of following emitter-coupled logic stages is not jeopardised by relatively small fluctuations of supply voltage.
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申请公布号 |
DE4214983(A1) |
申请公布日期 |
1993.11.11 |
申请号 |
DE19924214983 |
申请日期 |
1992.05.06 |
申请人 |
SIEMENS AG, 80333 MUENCHEN, DE |
发明人 |
BARRE, CLAUDE, DIPL.-ING., 8000 MUENCHEN, DE |
分类号 |
H03K19/0175;(IPC1-7):H03K19/017 |
主分类号 |
H03K19/0175 |
代理机构 |
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地址 |
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