发明名称 Selbsteinstellender Analog-Digitalwandler
摘要 1,240,686. Electric selective signalling. WESTERN ELECTRIC CO. Inc. 5 Sept., 1968 [6 Sept., 1967], No. 42184/68. Heading G4H. Data signals having one of N + 1 levels are compared with N prescribed levels centred between the N + 1 nominal levels, the prescribed levels being adjustable to centre them between the actual received signal levels when they differ from the nominal levels. In the embodiment described for four level signals, the three prescribed levels are determined by the reference signals fed on terminals 21, 22, 23 to comparators 13, 14, 16 which receive the input signal via a diode chain 24, 26, 28, 29, 31 which shifts the input signal so that nominally the same reference level is fed to all the comparators. When the input signal to a comparator exceeds the reference signal, an associated register 34, 36, 37 is set to its " 1 " state, the outputs 49, 51, 52 of the registers being connected to a decoder 53 which converts the parallel signals to binary signals representing the level. The level of the reference signals is determined by the output signals to a resistor chain from registers 69, 71, 72, 73 associated with further comparators 54, 56, 57, 58 which compare the input signal with the predetermined data levels, the reference signals being adjusted via feedback paths from junctions 107, 101, 99, 98, 96, 94, 108 in the resistor chains. Resistor pairs 119, 122; 133, 134; 136, 137 associated with the comparators 13, 14, 16 set the signals at terminals 21, 22, 23 midway between the received signals.
申请公布号 DE1762829(A1) 申请公布日期 1970.10.29
申请号 DE19681762829 申请日期 1968.09.05
申请人 WESTERN ELECTRIC COMPANY INC. 发明人 WILLIAM FARROW,CECIL
分类号 H03M1/00 主分类号 H03M1/00
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