发明名称 FREQUENCY SYNTHESIZER
摘要 PURPOSE:To attain intermittent operation while keeping a carrier output even at the time of high speed switching when an adjacent cell is monitored in a TDMA communication frame. CONSTITUTION:A PLL loop section 2 is provided with a loop filter 16 used exclusively at the time of channel synchronization of an adjacent cell and a loop filter changeover switch 20 selecting the loop filter 16 or a substantial loop filter 6. The charge of a capacitor 14 of the substantial loop filter 6 is kept constant by excluding the effect of dielectric absorption of the capacitor following charging/discharging at the time of changeover to the adjacent cell. Thus, the effect of power saving due to intermittent operation is improved.
申请公布号 JPH05291949(A) 申请公布日期 1993.11.05
申请号 JP19920091172 申请日期 1992.04.10
申请人 NEC CORP 发明人 JOKURA ATSUSHI
分类号 H03L7/10;H03L7/107;H03L7/18;H04B7/212 主分类号 H03L7/10
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