| 摘要 |
PURPOSE:To enable evaluating and LSI whose operation frequency is fast by an LSI tester whose clock signal is of low speed. CONSTITUTION:An LSI speed evaluation measuring device is constituted of an LSI tester 1, a signal generator 2 and a pulse extracting/outputting circuit 3. The LSI tester 1 supplies a measured LSI 4 with an input pattern S42, and the pulse extracting/outputting circuit 3 with a low speed timing pulse S11. Further, the pulse extracting/outputting circuit 3 is supplied with a high speed pulse S2 by a signal generator 2. The pulse extracting/outputting circuit 3 extracts one or a multiplicity of pulses out of the high speed pulse S2 by using a timing of the low speed timing pulse S1 as a reference, and then outputs it as a clock signal S3 to the measured LSI 4. |
