发明名称 POWER-SAVING CONTROLLER FOR COMPUTER SYSTEM
摘要 <p>PURPOSE:To enable proper and effective power-saving control by detecting a state wherein a CPU accesses only some address group repeatedly and judging whether or not switching to a power-saving mode is proper according to the period of the repetition. CONSTITUTION:A state deciding and power-saving controller 3 monitors the state of the computer system 1 and performs the power-saving control. A switching circuit 6 supplies the clock signal from a high-speed clock generating circuit 7 to the CPU of the computer system 1 to put the CPU in normal mode. Then whether or not the repetitive access state is generated in the operation state in the normal mode is monitored. When it is decided that there is the repetitive access state, it is decided whether or not the state of the computer system 1 matches exceptional conditions. When not, the switching circuit 6 is switched to put the CPU in the power-saving mode with the clock signal from a low-speed clock generating circuit 8.</p>
申请公布号 JPH05282081(A) 申请公布日期 1993.10.29
申请号 JP19920080806 申请日期 1992.04.02
申请人 发明人
分类号 G06F1/04;G06F1/32;G06F15/02;(IPC1-7):G06F1/32 主分类号 G06F1/04
代理机构 代理人
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