发明名称 DEMODULATING LOGARITHMIC AMPLIFIER
摘要 <p>A logarithmic amplifier gain stage for supplying, in response to an instantaneous input signal, an output signal corresponding to a logarithmic value of the input signal. The gain stage includes a transistor amplifier having an input that receives the input signal and an intermediate output that supplies an intermediate output signal. A full-wave detector having an input coupled to the intermediate output of the transistor amplifier receives the intermediate output signal and supplies the output signal wherein the detector includes a rectifier comprising transistors having different effective emitter areas. A topology for a logarithmic amplifier is also provided, including a first series-coupled chain of N gain stages having a first input, a second series-coupled chain of M gain stages having a second input, an attenuator coupled between the first input and the second input, a series-coupled chain of summers, each summer receiving an output signal from a respective gain stage in the first series-coupled chain and the second series-coupled chain and supplying a summed signal. A circuit including an output amplifier having an inverting input and a non-inverting input, the inverting input receiving an output of the plurality of gain stages, the non-inverting input receiving a voltage having a negative coefficient of temperature, the output amplifier providing at an output thereof the output signal having a temperature-stable log intercept.</p>
申请公布号 WO1993021689(A2) 申请公布日期 1993.10.28
申请号 US1993003536 申请日期 1993.04.14
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