发明名称 |
Neural network with multiplexed snyaptic processing |
摘要 |
In an apparatus for multiplexed operation of multi-cell neural network, the reference vector component values are stored as differential values in pairs of floating gate transistors. A long-tail pair differential transconductance multiplier is synthesized by selectively using the floating gate transistor pairs as the current source. Appropriate transistor pairs are multiplexed into the network for forming a differential output current representative of the product of the input vector component applied to the differential input and the stored reference vector component stored in the multiplexed transistor pair that is switched into the multiplier network to function as the differential current source. Pipelining and output multiplexing is also described in other preferred embodiments for increasing the effective output bandwidth of the network.
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申请公布号 |
US5256911(A) |
申请公布日期 |
1993.10.26 |
申请号 |
US19920896204 |
申请日期 |
1992.06.10 |
申请人 |
INTEL CORPORATION |
发明人 |
HOLLER, MARK A.;TAM, SIMON M. |
分类号 |
G06N3/063;(IPC1-7):G06F15/18 |
主分类号 |
G06N3/063 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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