| 摘要 |
The invention relates to a method of determining the position of a p-n junction or the depth of penetration of the diffused electrode in the case of semiconductor devices produced by planar technology. According to the invention, a test pattern which comprises N pairs of windows, the spacing of which increases from pair to pair, is included in exposure. During the diffusion operation, the tubs produced overlap in the pairs of windows lying relatively close together, touch in one pair of windows (no) and are separate from each other in pairs of windows lying relatively far apart. With the aid of a resistance measurement, the pair of windows (no) in which the two tubs are still just touching is established, from which the lateral depth of penetration Yj is obtained as half the spacing of this pair of windows. From the lateral depth of penetration, the vertical depth of penetration Xj can be established by means of the relationship Xj=CxYj. In developments of the method, there is also specified a correction possibility for the difference between layout dimension and etching dimension as well as a further possibility of establishing the exact value of the lateral depth of penetration Yjo. In the case of this possibility, the doping of the material which is diffused into can be determined.
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