| 摘要 |
PURPOSE:To provide a high-performance DRAM, which can be highly integrated and can be improved in retention characteristics, and to provide a SRAM, wherein a standby leakage current is little, the soft error breakdown strength is improved and the operation of memory cells are stabilized. CONSTITUTION:In the case where a DRAM is manufactured, a bit line BL of each memory cell for the dram is earthed at 0 volt, a word line WL is provided in the vicinity of a threshold voltage and an AC pulsed voltage is applied through one of the electrode layers constituting a capacitor of each memory cell, whereby a hot carrier stress voltage is applied to a P-MOS transistor. In the case where an SRAM is manufactured, word transistors Q3 and Q4 of each memory cell are turned on, the bit line BL and an inverted bit line BL' are earthed at 0 volt and a DC voltage is applied from the side of a power conductor VDD of a P-load TFT, whereby a hot carrier stress voltage is applied to the TFT. |
