| 摘要 |
PURPOSE:To speed up an address access time by supplying data read out from a memory cell to a pair of complementary data lines or a pair of common data lines to an output circuit without passing them through a sense amplifier. CONSTITUTION:A static RAM is constituted of a work line WORD, complementary data lines D1, D2 and a memory cell CELL. The CELL is constituted of a flip flop, a cell current is set up to about 0.8mA and a potential difference between the data lines D1, D2 due to the cell current is set up to about 200mV higher than a convensional value. The voltage is level-shifted by npn bipolar transistors(TRs) Q3, Q4 constituting the 1st emitter-follower and npn bipolar TRs Q12, Q13 constituting the 2nd emitter-follower and supplied to a differential npn bipolar TRs Q14, Q15 to be an output circuit without being passed through a sense amplifier. |
