| 摘要 |
<p>PURPOSE:To enable various kinds of memory devices to be formed into integrated circuits high in density on the same semiconductor substrate by a method wherein memory matrixes of different types are arranged adjacently to each other, and bit lines and/or row lines are driven in common by decorders. CONSTITUTION:An EEPROM cell matrix 1 and a flash EEPROM cell matrix 2 are arranged on the same memory cell matrix into an integrated circuit making bit lines confront each other. An EEPROM column decoder 3a selects the drain (bit) line of the cell matrix 1, and a row decoder 4a selects the row line of the cell matrix 1. A flash EEPROM column decoder 3b selects the drain line of the cell matrix 2, and a row decoder 4b selects the row line of the cell matrix 2. A peripheral logic 6 and so for th are provided to a semiconductor chip 5.</p> |
