发明名称 AMPLITUDE LIMIT PROCESSING CIRCUIT
摘要 PURPOSE:To suppress an error which exerts influence on a result of signal processing, with regard to the amplitude limit processing circuit for limiting the amplitude of an input signal by preceding a signal processing, in a signal processor for performing a prescribed signal processing to a complex signal given by the vector sum of two orthogonal input signals. CONSTITUTION:In the amplitude limit processing circuit for limiting the amplitude of two input signals by preceding a signal processing of a complex signal, this circuit is constituted by providing an orthogonal-polar coordinate converting means 11 for converting an orthogonal coordinate for showing the amplitude of two input signals on a signal space to a polar coordinate and deriving the amplitude of the complex signal and a phase angle, an amplitude limiting means 13 for limiting the amplitude of the derived complex signal to the prescribed upper limit value or below, and a pole-orthogonal coordinate converting means 15 for generating two orthogonal output signals by performing a coordinate conversion processing being opposite to the orthogonal-polar coordinate converting means 11 to the limited amplitude and phase angle, and also, setting these output signals as an object of the signal processing.
申请公布号 JPH05267968(A) 申请公布日期 1993.10.15
申请号 JP19920062316 申请日期 1992.03.18
申请人 发明人
分类号 G01S7/285;H03G11/04 主分类号 G01S7/285
代理机构 代理人
主权项
地址