| 摘要 |
PURPOSE:To reduce the delay time fluctuation width by providing a power supply clamp circuit. CONSTITUTION:A power supply clamp circuit 8 is connected to a power supply terminal of a delay generating circuit 2. A power supply voltage of the circuit 2 is clamped to a level of -VthD with respect to an external power voltage level of -VthD (threshold level of depletion MOS) or over. That is, a potential required for the generating circuit 2 is kept constant by fixing an upper limit of an internal voltage so that a voltage at a point of the circuit 8 dose not reach a predetermined voltage or over. Thus, a fluctuation width of a delay time of the delay circuit is designed small and the device sufficiently copes with the specification scope of an external voltage. Furthermore, a stable function operation is warranted over a wide power supply voltage range. |
