发明名称 SINGLE-CHIP MICROCOMPUTER
摘要 <p>PURPOSE:To widen the limitation of the operating frequency caused by a dynamic circuit without increasing the capacity value and to operate a single-chip microcomputer down to a low frequency by adding a circuit which can produce the time longer than the sampling time of an instruction decoder. CONSTITUTION:An instruction decoder 5 is provided with a latch signal producing part and a latch circuit to lath the output signal of an instruction decoder 5. These component elements are integrated on a single semiconductor board. Then, the decoder 5 is instructed to perform the precharging and dynamic sampling operations synchronously with the signal of a clock producing part 2. Meanwhile the latch signal producing part is instructed to produce a latch signal having the pulse width larger than the sampling time of the decoder synchronously with the signal of the part 2. Under such condition, the output of the decoder 5 kept in a normal sampling state is stored and kept in the latch circuit. Then, the output of the decoder 5 is supplied to each part of a device through the latch circuit to suppress the transmission of the abnormal signal that exceeds the holding time of a dynamic circuit.</p>
申请公布号 JPH05265747(A) 申请公布日期 1993.10.15
申请号 JP19920029850 申请日期 1992.02.18
申请人 发明人
分类号 G06F9/30;G06F15/78;(IPC1-7):G06F9/30 主分类号 G06F9/30
代理机构 代理人
主权项
地址