| 摘要 |
PURPOSE:To obtain the clamp circuit suitable for circuit integration in which no frequency is deteriorated and power consumption is not increased. CONSTITUTION:A signal current flowing to a collector of a transistor(TR) Q2 is fed to a common emitter of differential pair TRs Q3, Q4, its base voltage is used for current sharing to control the collector current. The base is connected to the collector of the TR Q4 and an output is extracted from an emitter of the TR Q5. An output level of the TR Q5 and a reference voltage are compared by a voltage control current source G1 in a timing of the clamp pulse. A current is respectively supplied to the common emitter of the TRs Q3, Q4 based on the result of comparison by the voltage control current source G1. |
