| 摘要 |
PURPOSE: To provide a computer system which gives an error detection and correction capability without sacrificing the operation speed. CONSTITUTION: This latch circuit which is capable of improved scanning to effectively monitor an output signal in 100% period of a system clock outputs signals of two independent systems consisting of a latch output Q and a shift register output SO. It includes first, second, and third latch elements; and when it is operated as a latch circuit, first and second latch elements are operated as a master and a slave of a master/slave latch circuit respectively. When it is operated as a shift register circuit, shift-in data SI is coupled to the second latch element, and this second latch element is operated as a master, and the third latch element is operated as a slave, and data is selectively shifted by a prescribed clock signal. |
