| 摘要 |
A packet handler (11) controls communications between a processor bus (10) and a packet bus comprising 16 information lines INFO-15, a single control line NOT-STROBE and a clock line GLOCK. The information lines can carry not only data DATAO-15 but also arbitration signals ARBO to ARB++, PRIO-7. To permit this multiplexed operation and tight control over the bus states, the states follow precisely defined sequences demarcated by state change codes. A state change is signalled by NOT-STROBE going low with simultaneous placement of a state change code DELIMO-3 on the lines INFO-3. Moreover the state change strobe is validated by a common qualifier QUALIFO-11 on information lines INFO-15. The packet handler (11) and bust (10) are particularly suited to communications using packets comprising typically header, header reply, data and data reply frames. The transmitter sends the header and awaits an acknowledgement header replay generated by the receiver packet handler with little or no host intervention. According to the reply (NAK, WAK, ACK) the transmitter can abort the packet, wait, or immediately send any data frame portion of the packet. A further reply may be sent confirming integrity of the received packet. <IMAGE>
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