| 摘要 |
<p>The phase of a burst locked oscillator (7) controlling a PAL chrominance decoder (4) is controlled by a processor including means (11,12) for summing V and U chrominance signal components of picture signal samples provided by the decoder, means (13 to 16) for protecting the difference between summed V from alternate lines of the picture signal, means (20,21) for integrating the V-difference value over a field of the television signal, and a second order loop filter (23) via which the integrated signal is applied to the oscillator (7) in a feed back loop to correct the phase of the oscillator. <IMAGE></p> |
