| 摘要 |
PURPOSE: To dispense with removing the selected field oxide region, when the bit lines are formed within an array by employing a contact structure in a high self-aligning conduction to form a conduction band on a field oxide region. CONSTITUTION: A gate oxide is formed on a silicon substrate to form a floating gate member for each memory cell provided thereon. Next, a plurality of narrow stacks which are isolated with each other in parallel are formed on the floating gate member which functions as the control gate for the rows of memory cell in the array and includes the polysilicon word line 22 which is insulated from the floating gate member with an inductive material layer. Next, a first dopant is injected into the space for isolating the stacks of the substrate, to form a source region and a drain region to form a sidewall insulating layer to the stack. Then, the space is filled with a metallic layer 26 and it is then patterned to form a self-aligned contact 25 to the source and drain regions, in order to mutually connect the adjacent common source regions which extend between the adjacent memory cells.
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