| 摘要 |
PURPOSE:To integrate a frame buffer and a main memory and to control them according to a virtual memory control system by receiving a logical address for processing display data at a memory managing means and translating it into a physical address. CONSTITUTION:Inside a memory managing unit 208, registers 71 and 72 to store the logical address and the physical address corresponding to an address generated by a rendering processor 202 and a flip-flop 73 to show the size of a relevant page are provided. After writing the logical address, physical address and page size, to which the address generated by the rendering processor 202 belongs, among initial set parameters to the rendering processor 202 in the registers 71-73, the rendering processor is started. When any interruption is generated for the addresses successively generated by the rendering processor 202 to get out of the set page, this address is read by a CPU and translated into the relevant physical address. |
