发明名称 CLOCK SYNCHRONIZATION SYSTEM
摘要 CLOCK SYNCHRONIZATION SYSTEM A clock synchronization system for synchronizing the performance of a number of clocks (46) so that they run parallel with a reference clock is disclosed. Each clock of this synchronization system includes a counter (52) that indicates the current time and that is sequentially incremented by a counter advance signal applied thereto. A time counter controller (54) both initializes the counter andgenerates the clocking signal that controls the advancement of the counter. The time counter controller further monitors the time indicated by the counter and compares it to a reference-time signal received from a reference clock. Based onthe comparison, the time counter controller selectively reinitializes the counter and adjusts the rate at which the clocking signal is applied to the counter so as to ensure that the counter advances at a rate equal to the rate at which the reference clock advances. In some versions of the invention, the comparison of the reference-time signal to the actual clock counter time is made at a maintenance operation point(58) remote from the clock. In these versions of the invention, the maintenance operation point reports the difference in the two times back to the time countercontroller, which, in turn, makes the appropriate adjustments to the counter and to the clocking signal. GLEN//5716API.DOC DSG:jjj
申请公布号 CA2091962(A1) 申请公布日期 1993.10.01
申请号 CA19932091962 申请日期 1993.03.18
申请人 GLENAYRE ELECTRONICS, INC. 发明人 WITSAMAN, MARK L.;GLESSNER, DAVID W.;BENZ, ROGER E.;CROWLEY-DIERKS, JOEL R.
分类号 G04G7/02;(IPC1-7):H04B7/24 主分类号 G04G7/02
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