发明名称 Holdover circuit for AC-to-DC converters.
摘要 <p>Holdover circuitry for an off line switcher, including a DC to DC converter (120), maximizes holdover time, during source voltage (Vin) failures, by commutating (by 222) a precharged holdover capacitor (221) to the input of a power factor correcting preregulator (110). This limits the size of the holdover capacitor required without any loss in holdover time. Reduction in the size of the required holdover capacitor required for a desired holdover time improves volumetric efficiency of the off line switcher. This arrangement further improves efficiency of the DC-to-DC converter and decreases stress on its components by narrowing the input voltage range requirement. <IMAGE></p>
申请公布号 EP0562772(A1) 申请公布日期 1993.09.29
申请号 EP19930302075 申请日期 1993.03.18
申请人 AMERICAN TELEPHONE AND TELEGRAPH COMPANY 发明人 FRAIDLIN, SIMON
分类号 H02J1/00;H02J9/06;H02M1/15;H02M3/10;H02M3/155;H02M3/28 主分类号 H02J1/00
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