发明名称 LOGICAL SYSTEM DETECTABLE OF FAULT OF ANY LOGICAL ELEMENT THEREIN
摘要 A logical system provided with a logical circuit using at least one logical element, in which the logical element performs a first logical function in response to a first control binary information and a second logical function in response to a second control binary information. Input pair signals (1,0) and (0,1) which are successive binary signal elements different from each other are applied to the logical circuit as input signals while control binary information is applied to the logical element so as to alternately perform the first logical function and the second logical function. Faults of the logical element can be detected by detecting at the output of the logical circuit a fault pair signal (1,1) or (0,0) which are successive signal elements of the same binary information.
申请公布号 US3652988(A) 申请公布日期 1972.03.28
申请号 USD3652988 申请日期 1970.07.14
申请人 KOKUSAI DENSHIN DENWA KK. 发明人 HIDEO YAMAMOTO;TERUJI WATANABE
分类号 H03K19/007;G06F11/16;(IPC1-7):G08C25/00 主分类号 H03K19/007
代理机构 代理人
主权项
地址