发明名称 MICROCOMPUTER SYSTEM
摘要 PURPOSE:To enable a CPU to carry on internal processing by attaching or detaching an optional I/O board to or from a CPU board during operation. CONSTITUTION:A signal holding circuit 13 can not receive the ground voltage of a connection signal generation part 22, and receives a high-level connection signal 1i and outputs a high-level connection holding signal 1b to a selector circuit 14 when the I/O board 20 is detached from the CPU board 10. The selector circuit 14 receives the high-level connection holding signal 1b and does not send out an operation inhibition signal 1c so as to permit a 1st timer circuit 15 to operate, and the 1st timer circuit 15 is allowed to operate and starts measuring the time once detecting an I/O request signal 1a for the I/O board 20 from the CPU 11 thereafter to outputs a time-limit passing signal 1d a specific time later to the operation permit signal input terminal and interruption input terminal of the CPU 1, so that the CPU 1 restarts the internal processing.
申请公布号 JPH05250303(A) 申请公布日期 1993.09.28
申请号 JP19920083354 申请日期 1992.03.05
申请人 NEC CORP 发明人 SUNAGA YUKIO
分类号 G06F13/14;G06F15/78 主分类号 G06F13/14
代理机构 代理人
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