| 摘要 |
PURPOSE:To attain simple circuit constitution in common use of time axis correction and de-interleaving by using a buffer with memory operation so as to attain time axis correction and inputting an address of the memory input to a memory while being de-interleaved according to a format in inputting a signal of each track to the memory. CONSTITUTION:A reproducing signal of a track is converted into a parallel signal by a serial/parallel converting circuit 11 and stored in a buffer 12 having memory action. A timing generator 31 receives a synchronizing signal (a) of a data storage section 10 being a specific track and generates signals b1, b2,...bi,... bn decided timewise in time division. The signals b1-bn are inputted to priority discrimination circuits 15, 25 of the data storage sections 10, 20. When this signal is inputted, timing generators 14, 24 read read/write signals 14a, 24a with priority and the data of an address decided by address generators 16, 26 is transmitted to a data bus 40 from the buffers 12, 22, then a reproducing signal of each track is given in time division on the data bus 40. |
