| 摘要 |
PURPOSE:To largely enhance the cut-off frequency of a transistor and to provide a superhigh speed logic LSI bipolar transistor by forming a buried collector directly under an active region of the transistor and reducing the junction capacity of the collector substrate. CONSTITUTION:After forming a channel cutting region 7 on a P-type silicon substrate 1, with an SiO2 layer 2 as a mask an N<+>-type buried layer 3 is formed. Then, an epitaxial layer 4 is formed on the surface, arsenic ion is selectively implanted and diffused to form a collector drawing region 13 relative to the N<+>-type buried layer 3. Then, the unnecessary polycrystalline layer is removed, and an insulation isolating film 8 is grown thereon. Thereafter, an active base 10 and a non-active base 11 are formed thereon, an N<+>-type emitter region 12 is formed to form the respective electrodes in the regions. Thus, it can provide a transistor which incorporates a low collector resistance rC, collector vs. substrate capacity CTS, and base vs. collector junction capacity CTC. |
