发明名称 |
METHOD FOR CONTROLLING POWER CONSUMPTION FOR COMPUTER AND SYSTEM THEREOF |
摘要 |
<p>PURPOSE:To reduce the power consumption of computers by controlling the clock frequency thereby operating integrated circuits of microprocessors. CONSTITUTION:The calculation speed of the computer system or the number of executing instructions per second is directly related to the frequency of the clock pulse supplied to a microprocessor 13 by means of a clock signal generation circuit 15. By varying the clock frequency of the clock signal generation circuit 15, the speed of calculation or logical operation is reduced during the low-capacity calculation or the logical capacity period so as to reduce the voltage consumption.</p> |
申请公布号 |
JPH05241677(A) |
申请公布日期 |
1993.09.21 |
申请号 |
JP19920304840 |
申请日期 |
1992.10.16 |
申请人 |
NIPPON STEEL CORP |
发明人 |
DEIBITSUTO II MATSUKINRII;DOUKU ENU FUAMU |
分类号 |
G06F1/04;(IPC1-7):G06F1/04 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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