发明名称 VP TEST METHOD AND VP TEST DEVICE FOR ATM SYSTEM
摘要 PURPOSE:To provide the method and device for VP(Virtual Path) detecting erroneously distributed cells and missing cells and presenting the high error measurement capacity. CONSTITUTION:A PN pattern generation circuit 21, sequence number counter 32, and OAM cell insertion circuit 22a are provided for the transmission. A sequence number testing circuit 41, abnormal cell counter 42, PN pattern detection circuit 23a, comparison circuit 24, and error bit counter 43 are provided for the reception. An abnormal cell can be detected by detecting the noncoincidence between the sequence number in the OAM cell and the counted sequence number in the sequence number testing circuit 41. When detecting an abnormal cell, the count of a PH pattern error bit in a PN pattern detection circuit 23a is stopped.
申请公布号 JPH05244196(A) 申请公布日期 1993.09.21
申请号 JP19920284535 申请日期 1992.10.22
申请人 NEC CORP;NIPPON TELEGR & TELEPH CORP <NTT> 发明人 MIYAMOTO AKIHIRO;IKEMATSU RYUICHI;MATSUNAGA HARUHIKO;UEDA HIROMI
分类号 H04Q11/04;H04L12/26;H04L12/70 主分类号 H04Q11/04
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